The present invention relates to a microprocessor including plural instruction execution units.
A communications processor (microprocessor) for use in a cellular telephone disclosed in U.S. Pat. No. 5,768,613 includes two instruction execution units mounted on a single semiconductor chip. A first instruction execution unit is a central processing unit (CPU) for controlling the entire operation of a cellular telephone. A second instruction execution unit is a digital signal processor (DSP) for processing a speech signal in accordance with a predetermined algorithm including multiplication and accumulation, and includes a random access memory (RAM) for storing plural instruction codes.
In a recent cellular telephone, a program for the DSP has become huge in accordance with complication of the speech processing algorithm. Accordingly, the most part of the microprocessor chip is disadvantageously occupied by the RAM included in the DSP.